VHDL设计的串口通信程序

文章摘要： state_tras <= state_tras + "0001"; END IF; WHEN "0111" => 发送第7位 IF (clkbaud_tras = ’1’) THEN txd_reg <= txd_buf(0); txd_buf(

VHDL设计的串口通信程序,标签：eda技术,eda技术实用教程,http://www.88dzw.com
                           state_tras <= state_tras + "0001";   
                        END IF;
               WHEN "0111" => 发送第7位
                        IF (clkbaud_tras = ’1’) THEN
                           txd_reg <= txd_buf(0);   
                           txd_buf(6 DOWNTO 0) <= txd_buf(7 DOWNTO 1);   
                           state_tras <= state_tras + "0001";   
                        END IF;
               WHEN "1000" =>  发送第8位
                        IF (clkbaud_tras = ’1’) THEN
                           txd_reg <= txd_buf(0);   
                           txd_buf(6 DOWNTO 0) <= txd_buf(7 DOWNTO 1);   
                           state_tras <= state_tras + "0001";   
                        END IF;
               WHEN "1001" =>  发送停止位
                        IF (clkbaud_tras = ’1’) THEN
                           txd_reg <= ’1’;   
                           txd_buf <= "01010101";   
                           state_tras <= state_tras + "0001";   

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