HFAN-08.2.0: Thermoelectric Co

文章摘要：With C1 = 1uF and Fc = 2 Hz it follows thatXc = -79.6kiThe gain for U1 isWith R3 = 243k and Xc = -79.6ki, G = 3.05 or 9.7 dB. We now must provide 20.3 dB in the front-end. The front-end gain section, formed by R4, R5 and U2, will also boost the low level signal from the temperature monitor (a 10k at

HFAN-08.2.0: Thermoelectric Co,标签：计算机控制技术,工厂电气控制技术,http://www.88dzw.com



With C1 = 1uF and Fc = 2 Hz it follows that

Xc = -79.6ki

The gain for U1 is



With R3 = 243k and Xc = -79.6ki, G = 3.05 or 9.7 dB. We now must provide 20.3 dB in the front-end. The front-end gain section, formed by R4, R5 and U2, will also boost the low level signal from the temperature monitor (a 10k at 25C thermistor) and help to overcome the offset errors from the compensation section (U1). With R4 = 10k and R5 = 100k the front-end gain is 11 or 20.8 dB.

The entire loop and the compensation values are shown in Figure 3. This block shows a jumper selectable Digital to Analog Converter (DAC) or a potentiometer to set the TEC module temperature. The temperature set point (SET POINT IN) is subtracted from the temperature monitor (THERM), then amplified and sent to the PID compensation section. Due to the good phase margin provided by the PID compensator this circuit is very tolerant to TEC gain variations in heating or cooling modes.

Selecting components for this circuit will depend on the specific requirement needed. For the U2 and U3, an Op Amp with low offset voltage drift like the MAX4477ASA is a good choice. Because of the low signal level at the thermistor, shielded wire should be used. U1 should have ultra low leakage current to avoid DC offsets generated by the high circuit impedance. The MAX4475ASA with 150 pA maximum leakage current is a good choice. The components around U1, in particular C2 and C3 should be selected with the highest leakage resistance and C2 lowest thermal drift possible. Polystyrene film capacitors are the best choice but they are very large and expensive. Ceramic caps are a good choice, but the larger values can leak sufficiently to cause gain errors. Do not use Electrolytic or Tantalum capacitors. A guard ring constructed with a PC board trace placed around and under the inverting pin on U1 and its components should be connected to the non-inverting pin of U1. The guard ring intercepts any stray currents that can induce errors in the summing junction. Solder flux, moisture and fiberglass PC boards can contribute to leakage currents and a guard ring can improve these effects. Conformal coating the board and its components can help keep contaminates from interfering with circuit performance.

Testing of the loop can be done with a unit step function. A simple change in temperature set point should induce a response in the thermistor that converges on the new temperature set point with very little overshoot. If ringing is observed in the step response, this indicates poor phase margin at the crossover frequency. By noting the ringing frequency and the number of rings, adjustments can be made in the DC gain (crossover frequency) or the compensation circuit (phase margin) until an acceptable response is met. By using this method and some insight into TEC behavior, a TEC loop can be compensated without a network analyzer. Even with the help of a network analyzer, the system should be checked in heating and cooling modes with a unit step response. Heating the TEC in cooling mode and cooling in heating mode presents the worst cases. DC errors in the loop can be measured with a 6 digit meter with 1 gig Ω input impedance like the Agilent 34401A set up to measure the difference between Set Point In and Therm (See Figure 3). This error should be in the 100 uV range. Noise can be measured at the same points with a differential amplifier like the Tektronix ADA400A and a scope. With 100Hz bandwidth, this error should be under 20uV P-P.

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