SST89C58电子盘电路及代码

文章摘要：ChkPwrEqu0E5h; 98hDiagnosticEqu90hFormatEqu50hIdentifyEqu0EChIdleEqu0E3h; 97hIdleImmEqu0E1h; 95hInitializeEqu91hReadBufEqu0E4hReadLongEqu22h; 23hReadMultiEqu0C4hReadSctrEqu20h; 21hReadVerifyEqu40h; 41hRecalibrateEqu10h; 1xhSeekEqu70h; 7xhSetFeatureEqu0EFhSetMultiEqu0C6hSleepEqu0E6h; 99hStandbyEqu0E2

SST89C58电子盘电路及代码,标签：电路设计,http://www.88dzw.com

ChkPwrEqu0E5h; 98h

DiagnosticEqu90h

FormatEqu50h

IdentifyEqu0ECh

IdleEqu0E3h; 97h

IdleImmEqu0E1h; 95h

InitializeEqu91h

ReadBufEqu0E4h

ReadLongEqu22h; 23h

ReadMultiEqu0C4h

ReadSctrEqu20h; 21h

ReadVerifyEqu40h; 41h

RecalibrateEqu10h; 1xh

SeekEqu70h; 7xh

SetFeatureEqu0EFh

SetMultiEqu0C6h

SleepEqu0E6h; 99h

StandbyEqu0E2h; 96h

StandbyImmEqu0E0h; 94h

WriteBufEqu0E8h

WriteLongEqu32h; 33h

WriteMultiEqu0C5h

WriteSctrEqu30h; 31h

WriteVerifyEqu3Ch

;=============================================================

; ADC Drive Register Set definitions

Data_RegEqu8000h; Data Register for read / write

Error_RegEqu8001h; Error Register, read only

FeaturesEqu8001h; features Register, write only

Sectr_CntEqu8002h; Sector Count Register ( R / W )

Sectr_NoEqu8003h; Sector Number Register, or LBA0:7 ( R / W )

Cylinder_LowEqu8004h; Cylinder Low Register or LBA8:15 ( R / W )

Cylinder_HiEqu8005h; Cylinder High Register or LBA16:23 ( R / W )

Drv_HeadEqu8006h; Drive Head Register ( R / W )

StatusEqu8007h; Status Register, read only

CommandEqu8007h; Command Register, write only

Alt_StatusEqu4006h; Alternate Status Register, read only,

; reading Alt_Status doesn't clear interrupt pending flag. Not used in this demo.

Device_CtrlEqu4006h; Device Control Register, write only. Not used in this demo.

Drive_AddrsEqu4007h; Drive Address Register, read only. Not used in this demo.

;=================================================================

; SST FlashFlex51 microcontroller related SFR's definition

SFCFDATA0B1H; SuperFlash Configuration

SFCMDATA0B2H; SuperFlash Command

SFALDATA0B3H; SuperFlash Address Low

SFAHDATA0B4H; SuperFlash Address High

SFDTDATA0B5H; SuperFlash Data

SFSTDATA0B6H; SuperFlash Status

WDTCDATA0C0H; Watchdog Timer Control

WDTDDATA86H; Watchdog Timer Data/Reload

;=================================================================

; constantdefinition

FlashAddrsEqu0F800h; start address to store data from ADC

;===========================================

org0000h

ljmpstart

org0100h

start:clrP1.4; reset ADC

nop

nop

nop

nop

setbP1.4

movr4, #5; delay 0.5 second

loadr5:movr5, #200; delay 0.1 second

loadr6:movr6, #250; delay 0.5ms for 12MHz crystal

djnzr6, $

djnzr5, loadr6

djnzr4, loadr5

acallEnable8bit; First of all, enable 8 bits operation!

;========================================

orlSFCF,#40h; IAPEN=1

movSFAH,#high(FlashAddrs)

movSFAL,#low(FlashAddrs)

movB,#8; erase 8 sectors (512 bytes)

;========================================

erase:movSFCM,#0Bh; sector erase!

acallDone?

mova,SFAL

adda,#64;64 bytes / sector in Block 1 of SST89C54/58

movSFAL, a

mova,SFAH

addca,#0

movSFAH, a

djnzB,erase

anlSFCF,#0BFh; disable IAP

;========================================

main:acall Write_Sctr

acall Read_Sctr

acall Compare

jbF0, fail

clrP1.4; indicates successful operations.

setbP1.5

sjmp$

fail:clrP1.5; flags failed comaprison.

setbP1.4

sjmp$

;========================================

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