检测电路保持您的微处理器控制-Supervisory Cir

文章摘要：This flip-flop and similar CPLD circuitry in the path of the STROBE signal ensures that both signals come up in a high state, thus disabling the WDT. Once the DSP boots properly, it sets the ENABLE flag low. This action clears the WDS flip-flop to zero, which allows the STROBE signal to propagate ou

检测电路保持您的微处理器控制-Supervisory Cir,标签：计算机控制技术,工厂电气控制技术,http://www.88dzw.com

This flip-flop and similar CPLD circuitry in the path of the STROBE signal ensures that both signals come up in a high state, thus disabling the WDT. Once the DSP boots properly, it sets the ENABLE flag low. This action clears the WDS flip-flop to zero, which allows the STROBE signal to propagate out of the CPLD to the WDT input. This transition enables the WDT. The flip-flop is configured such that the WDS input cannot go high again without a full reset of the DSP. To avoid a soft reset, the DSP must now service the WDT every 4ms.

Timeout of the WDT asynchronously latches its reset output in the CPLD, which in turn clears the host interface registers residing in the CPLD. This action flags the host that a soft reset has occurred. The latched reset exits the CPLD to soft-reset the FPGA, and is also gated with the hard reset (MAX6315 output) to disable (zero) the analog outputs. A 74x08 gate in a SOT package, which operates down to very low voltages, ensures that the reset remains valid when the 5V supply sags. Because the analog-control outputs have been disabled, the host can now decide at its leisure what to do. It can reboot the DSP through the PCI interface and remove the soft reset by clearing the latch when the DSP is ready. Alternatively, it can reboot the entire system.

Using three standard supervisory products, a common SOT23-packaged gate, and minimal CPLD resources, MEI has implemented very sophisticated protection. The circuit comprises five SOT packages, eight small resistors, two small capacitors, and a single eight-pin µMax package half the size of a SO-eight package. The total board space required is roughly the same as that occupied by a standard 16-pin SO and an eight-pin SO package.

Microprocessor-supervisory ICs provide needed protection for the majority of today's applications, from the simplest power-on reset to complex, multiple supervisory functions. To maximize operational uptime in a system, the designer must understand the capability, utility, and limitations of these ICs. Even when no single part includes all the functions desired for a specific application, a judicious use of smaller, building-block components can do a cost-effective job with minimal use of space.

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