Using Timers in the MAXQ Famil

[09-13 17:04:23]   来源:http://www.88dzw.com  控制技术   阅读:8620

文章摘要:ExamplesCompare Example 1 - Output a waveform with gatingThe following code will output a signal with a frequency of 100 Hz and a duty cycle of 1/3. The code was written for a clock speed of 4.9152 MHz. The reload value of 4000h (16384 decimal) provides C000h (49152 decimal) clock cycles between the

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Examples

Compare Example 1 - Output a waveform with gating
The following code will output a signal with a frequency of 100 Hz and a duty cycle of 1/3. The code was written for a clock speed of 4.9152 MHz. The reload value of 4000h (16384 decimal) provides C000h (49152 decimal) clock cycles between the reload and the overflow and subsequent reload for a period of 10 ms (100 Hz). The compare value of C000 gives us 32768 clock cycles (C000h - 4000h) or 6.7 ms after the reload that the compare (and consequently, the pulse edge) will occur.

The T2POL1 bit sets the initial value since we are using the secondary output, the primary being used for gating. The T2POL0 bit selects the gating level in this case. With T2POL1 set to 0, the initial value of the output is 0, so the output is low for 6.7 milliseconds followed by high for 3.3 milliseconds. The 1/3 duty cycle waveform will be output as long as the primary pin is held high. When the primary pin is pulled low the counter will stop counting and will hold the secondary pin at the current level. The waveform can be inverted (making a 2/3 duty cycle pulse) by setting T2POL1 to 1. The gating level can be changed to active high by setting T2POL0 to 1.

move	T2V0, #04000h ; set to reload value to keep first pulse
  ; from being extra long
	move 	T2R0, #04000h ; reload value
	move 	T2C0, #0C000h ; compare value

	move 	T2CFG0, #000h ;
; 0000,0000 - use system clock (0), divide by 1 (000),
;	16 bit mode (0), compare mode (00), c/t2=timer (0)

move 	T2CNB0, #040h
; 0100,0000 - ET2L off - low interrupts not available in 16-bit mode (0),
;	secondary OE is on (1), POL1 = low starting value (0), reserved (0)
;	TF2 is not used (0), TF2L is not used (0), TCC2 is not used (0),
;	TC2L is not used (0)

move 	T2CNA0, #009h
; 0000,1001 - ET2 off - interrupts not needed (0),
;	primary OE off as primary pin is used for gating (0),
;	POL0 low, gated when primary pin is low (0), TR2L is not needed (0)
;	TR2 on, run enabled (1), CPRL2 is not needed (0),
;	SS2 is not needed (0), gating enabled (1)

Compare Example 2 - Single shot pulse
The following code was written for a MAXQ2000 part, which has 3 separate Timer 2s. It uses the third timer, which is in module 4. It is also written for a system clock frequency of 4.9152 MHz and will output a low pulse with a width of two milliseconds when triggered, with the output normally being high. At the end of the pulse an interrupt will be generated to indicate that the pulse has finished. This code uses the timer in eight-bit mode and also demonstrates use of the prescaler.

To obtain the desired two millisecond period, a prescale value of 64 and a timer period of 154 prescaled clocks (4915200 / 64 * 0.002 = 153.6) are used. Selecting a compare value of 66h (100h - 9Ah) gives us 9Ah (154 decimal) ticks before the counter overflows from FFh to 00. Setting the reload value to 65h causes the pulse to start 1 tick after we set the SS2 (single shot) bit.

SetupPulse:
	; This code sets up the timer and should be run once
	; set up Int handler
	move    IV, #IntHandler	    ; Set interrupt vector.
    	move    IC.0, #1            ; Enable global interrupts.
    	move    IMR.4, #1           ; Enable interrupts for module 3.
	; timer 0 is in module 3, timer 1 & 2 are in module 4

	move 	T2CFG2, #068h ;
; 0110,1000 -- use system clock (0), divide by 64 (110),
;	8 bit mode (1), compare mode (00), c/t2=timer (0)

	move 	T2CNB2, #000h
; 0000,0000 -- ET2L off, low interrupts not needed (0), secondary OE off (0),
;	T2POL1 = not used (0), reserved(0)
;	TF2 is generated by the timer (0), TF2L is not used (0), TCC2 is not used (0),
;	TC2L is not used (0)

	move 	T2CNA2, #0E0h
; 1110,0000 -- ET2 on, interrupt will be generated (1), primary OE on (1),
;	T2POL0 is high (1), TR2L is not needed (0)
;	TR2 off, run not enabled (0), CPRL2 is not needed (0), SS2 is set later (0),
;	gating disabled (0)

	move	T2H2, #065h ; set to reload value
	move 	T2RH2, #065h ;
	move 	T2CH2, #066h ; 0x100 - 0x66(compare value) = 0x9A = 154 ticks

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