Using Timers in the MAXQ Famil
[09-13 17:04:23] 来源:http://www.88dzw.com 控制技术 阅读:8620次
文章摘要:Output enables should be turned on before or at the same time as the run enable. Setting the run enable before the output enable can cause the output to be inverted since it is possible for interrupts to cause the code to be suspended (while the interrupt is serviced) in between the time the timer i
Using Timers in the MAXQ Famil,标签:计算机控制技术,工厂电气控制技术,http://www.88dzw.comOutput enables should be turned on before or at the same time as the run enable. Setting the run enable before the output enable can cause the output to be inverted since it is possible for interrupts to cause the code to be suspended (while the interrupt is serviced) in between the time the timer is set to run and when the output enable is asserted. This can cause a compare or overflow event to happen before the output is enabled, which causes the output to be of the opposite polarity. This usually happens with the B or secondary output since the output enable (T2OE1) is in the T2CNB register while the run bit (TR2) and low run bit (TR2L) are in the T2CNA register. In this case the T2CNB register should be set up first or the T2CNA register should be set up with the run bits set to zero and then set the run bits after all registers have been configured.
Appendix: Table of bit settings for various modes
MODE | T2MD | C/T2 | CCF[1:0] | T2OE[0] | T2OE[1] | T2POL[0] | T2POL[1] | G2EN | SS2 | CPRL2 |
16 bit compare with optional gating | 0 | 0 | 00 | 0 = primary output not enabled | 0 = secondary output not enabled 1 = secondary output enabled |
Defines gating level 0 = low 1 = high |
Defines initial polarity of secondary output 0 = low 1 = high |
0 = no gating 1 = gating enabled on primary pin |
1 = Single shot 0 = use TR2 for run |
0 Not used |
16 bit compare with primary output enabled (no gating available) | 0 | 0 | 00 | 1 = primary output enabled | 0 = secondary output not enabled 1 = secondary output enabled |
Defines initial polarity of primary output 0 = low 1 = high |
Defines initial polarity of secondary output 0 = low 1 = high |
0 Not usable with primary output enabled |
1 = Single shot 0 = use TR2 for run |
0 Not used |
16 bit capture Capture on one edge only | 0 | 0 | 01 = Capture on rising edge 10 = Capture on falling edge |
0 Not used |
0 Not used |
Gating level on primary pin 0 = low 1 = high |
0 Not used |
1 = Gating enabled 0 = Gating disabled |
1 = Single shot 0 = use TR2 for run |
Capture and reload 0 = off 1 = on |
16 bit capture Capture on both edges, no reload | 0 | 0 | 11 = Capture on both eges | 0 Not used |
0 Not used |
Gating level on primary pin 0 = low 1 = high |
0 Not used |
1 = Gating enabled 0 = Gating disabled |
1 = Single shot 0 = use TR2 for run |
0 = Capture and reload off |
16 bit capture Capture on both edges, reload on both | 0 | 0 | 11 = Capture on both edges | 0 Not used |
0 Not used |
Start/stop edge 0 = start/stop on rising 1 = start/stop on falling |
0 Not used |
0 = reload on all edges | 1 = Single shot T2POL[0] defines start/stop edge 0 = use TR2 for run |
1 = Capture and reload on |
16 bit capture Capture on both edges, reload on one edge | 0 | 0 | 11 = Capture on both edges | 0 Not used |
0 Not used |
Non reload edge and start/stop edge 0 = falling (start/stop on rising) 1 = rising (start/stop on falling) |
0 Not used |
1 = reload on one edge only T2POL[0] defines capture only edge | 1 = Single shot T2POL[0] defines start/stop edge 0 = use TR2 for run |
1 = Capture and reload on |
16 bit counter | 0 | 1 | 01 = rising 10 = falling 11 = both 00 = none (Not Used) |
0 Not used Primary pin is input only |
0 = secondary output not enabled 1 = secondary output enabled |
0 Not used Primary pin is input only |
Defines initial polarity of secondary output 0 = low 1 = high |
0 Not used Do not set to 1 |
0 Not used Do not set to 1 |
0 Not used |
Dual 8 bit compare with gating | 1 | 0 | 00 | 0 = primary output not enabled | Secondary counter output enable 0 = not enabled 1 = output enabled |
Defines gating level 0 = low 1 = high |
Defines initial polarity of secondary counter outpu 0 = low 1 = high |
0 = no gating 1 = gating enabled on primary pin |
0 Not used | 0 Not used |
Dual 8 bit compare with no gating | 1 | 0 | 00 | 1 = primary output enabled | Secondary counter output enable 0 = not enabled 1 = output enabled |
Defines initial polarity of primary output 0 = low 1 = high |
Defines initial polarity of secondary counter output 0 = low 1 = high |
0 Not usable with primary output enabled | 1 = Single shot 0 = use TR2 Only applies to primary counter |
0 Not used |
8 bit capture + 8 bit compare | 1 | 0 | 01, 10, 11 The primary counter acts just as in 16 bit mode (except with only 8 bit resolution) |
See 16 bit capture modes | Secondary counter output enable 0 = not enabled 1 = output enabled |
See 16 bit capture modes | Defines initial polarity of secondary counter output 0 = low 1 = high |
See 16 bit capture modes | See 16 bit capture modes | See 16 bit capture modes |
8 bit counter + 8 bit compare | 1 | 1 | 01 = rising 10 = falling 11 = both 00 = none (Not Used) |
0 Not used Primary pin is input only |
Secondary counter output enable 0 = not enabled 1 = output enabled |
0 Not used Primary pin is input only |
Defines initial polarity of secondary counter output 0 = low 1 = high |
0 Not used Do not set to 1 |
0 Not used Do not set to 1 |
0 Not used |
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